Photonic computing is a research hotspot in the field of advanced computing due to its advantages of high speed, high throughput, and low power consumption. However, neuromorphic photonic computing systems are facing key technical challenges such as low integration density and difficult error correction, which hinder their wide practical application.
To overcome these issues and expand the scale of photonic integration, Xing Lin has carried out years of research on large-scale photonic neural network architecture and optoelectronic fused intelligent computing processors based on diffractive photonic computing. Xing is an assistant professor at Tsinghua University.
Xing proposed the theory and method of the all-optical diffractive deep neural networks (D2NNs) in both spatial and frequency domains, constructing large-scale weighted interconnections between the diffractive optical neurons and multilayer neurons. This addressed the long-standing problem of low integration density and limited network parameters caused by the large footprint of the basic computing unit of the photonic neural network.
The performance of photonic neural networks depends on the architecture. Xing prototyped a novel large-scale reconfigurable diffractive photonic computing unit (DPU) and its silicon-based integrations for constructing advanced architectures. Compared with cutting-edge electronic computing platforms, DPU-based intelligent computing systems can achieve orders of magnitude improvement in computing performance.
To achieve the error correction of large-scale photonic neural networks, Xing proposed precise training methods, including in situ adaptive training, optical backpropagation, and optical residual learning, which obtain more accurate gradient calculation and realize the precise mapping from the network model to the physical system.
In the future, Xing aims to achieve the industrialization and wide application of photonic computing in artificial intelligence, mass data processing, and high-throughput communication, and to approach the theoretical upper limit of the speed and efficiency of photonic computing chips.